158 results about "Input design" patented technology

A method for designing an electronic component includes receiving a device criteria (e.g., a parametric value, procurement value, etc.) from a designer, querying a database for devices corresponding to the device criteria, querying the database for procurement data and / or engineering data associated with the corresponding devices, presenting the devices to the designer based on the procurement data, and receiving input from the designer identifying one of the presented devices as a selected device. In a particular method, the returned devices are sorted based on one or more procurement values (e.g., manufacturer, price, availability, manufacturer status, etc.), and presented to the designer in a ranked list. Objects representative of the selected devices are then entered into a design file, and the objects are associated with the device's engineering and / or procurement data. In a particular embodiment, the objects are associated with the engineering data by embedding the engineering data in the file object. Optionally, data can be associated with the objects via links to the database. Types of engineering data that can be associated with design file objects include, but are not limited to, device footprint data, device pinout data, device physical dimension data, parametric data, and packaging data. Additionally, connection data and annotation data can be entered into the design file objects by the designer.

The present disclosure is directed toward systems and methods for retargeting a user's input digital design based on a selected template digital design. For example, in response to the user's selection of a template digital design, one or more embodiments described herein change various design features of the user's input digital design to match corresponding design features in the selected template digital design. One or more embodiments described herein also provide template digital designs to the user for use in retargeting after a two-step selection process that ensures the provided template digital designs are compatible with the user's input digital design.

A method and apparatus for partitioning of the input design into repeating patterns called template cores for the application of reticle enhancement methods, design verification for manufacturability and design corrections for optical and process effects is accomplished by hierarchy analysis to extract cell overlap information. Also hierarchy analysis is performed to extract hierarchy statistics. Finally template core candidates are identified. This allows to the design to be made amenable for design corrections or other analyses or modifications that are able to leverage the hierarchy of the design since the cell hierarchy could otherwise be very deep or cells could have significant overlap with each other.

An automatic level controlled system for delivering satellite signals to at least one Integrated Receiver Decoder (IRD). The system includes a plurality of inputs, designed to receive a plurality of satellite signals, wherein the satellite signals are directed to the inputs based on an originating satellite for each of the satellite signals, an automatic level controller, coupled to the inputs, for adjusting a signal strength associated with each the satellite signals such that each of the signal strengths are within a predetermined range, a multiswitch, having a plurality of inputs and a plurality of outputs, wherein at least one input of the multiswitch is coupled to the automatic level controller, and an interface, wherein at least one of the outputs of the multiswitch provides a signal to the interface, such that at least one new IRD coupled to an output of the interface receives a portion of a satellite signal based on commands sent to the interface from the new IRD.

Disclosed is a turning radius calculation method including: expressing a steering system model by means of relational expressions having a steering angle and turning angles of outer and inner tires as variables and including known parameters and unknown parameters; entering data on the known parameters based on design data; calculating the unknown parameters from the relational expressions corresponding to a zero-steering state and the relational expressions corresponding to a full-steering state; calculating turning angles of outer and inner tires respectively corresponding to a plurality of steering angles between the zero-steering state and the full-steering state using the relational expressions where calculated data on the unknown parameters are entered; calculating turning radii corresponding to the calculated turning angles of the outer and inner tires; and calculating an approximate function of turning radius for steering angle based on the plurality of steering angles and the turning radii.

A control computer 110 determines, for each detected pattern defect, a defect inspection pattern area of predetermined X and Y dimensions containing the coordinates of the defect, then determines the clusters or cells whose reference points are located within the defect inspection pattern area. Then extracts the data of these clusters or cells from design pattern data read from a first magnetic disk unit 109a. The control computer 110 then generates an output file containing the extracted data. The output file is then converted into the same format as the input design pattern data or into OASIS format, before it is output to a second magnetic disk unit 109b. The extracted pattern data specifying the clusters or cells within each defect inspection pattern area can be output from the mask inspection system 100 to external systems.

A system and method are disclosed for legalizing a flat or hierarchical VLSI layout to meet multiple grid constraints and conventional ground rules. Given a set of ground rules with multiple grid constraints and a VLSI layout (either hierarchical or flat) which is layout-versus-schematic (LVS) correct but may not be ground rule correct, the system and method provide a legalized layout which meets the multiple grid constraints while maintaining LVS correctness and fixing the ground rule errors as much as possible with minimum layout perturbation from the input design. The system and method support multiple grid pitch constraints for hierarchical design, and provide for LVS correctness to be maintained while an on-grid solution possibly with some spacing violations.

The invention discloses an input saturation-considered unmanned surface vehicle full-state constraint trajectory tracking control method, relates to an unmanned surface vehicle control method, and aims at solving the problem that existing unmanned surface vehicle trajectory tracking control-oriented control methods do not process state constraint and saturation problems. According to the method, akinetic model of a 3-degree of freedom and multiple-input-multiple-output unmanned surface vehicle; a saturated closed-loop system is established and a self-adaptive method is selected to estimate squares of unknown interference upper limits and control input difference upper limits; and self-adaptive laws are designed for unknown interferences and control inputs according to the self-adaptive method, and a controller is designed according to a pseudo-inverse condition so as to control the unmanned surface vehicle. The method is suitable for the control of unmanned surface vehicles.

The present invention pertains to automated technology dependent transformations for Silicon-On-Insulator (SOI) in the digital design synthesis, the transformations include the steps of receiving input design specification in the form of technology independent specification or interconnected library of standard-cells; performing the technology dependent transformations in the digital design synthesis, resulting in interconnected SOI standard-cells from a SOI target library accounting for floating body effects, including floating body effects affecting delays over long periods of simulation time or testing over long times on fabricated SOI library cells, or SOI transistor level representations, transistor sizing and evaluating the standard-cell mapping and transistor-level representation for all or portion of the input design specification iteratively to meet delay and power constraints for SOI.

The invention discloses a no-speed feedback dynamic surface control method for a steering engine pan-tilt. The method comprises camera azimuth angle and pitch angle calculation, steering engine model construction and analysis, high-gain observer design, dynamic surface control input voltage design, control parameter design and adjustment, and tracking performance examination according to a simulation experiment. The control method does not need to add an extra angular speed hardware measurement circuit, control input design is simple, control parameters are easy to adjust, and steering engine control precision is high.

A system and related method for placing three-dimensional food ingredients on a surface of an object, such as a pizza or other good to be baked that includes a memory for storing computer executable instructions, a processing device to execute the instructions, dispensing devices that are each structured and arranged to contain one food ingredient, and a distribution device that is structured and arranged to place food ingredients at discrete locations on the surface of the object in accordance with an input design that is replicated using the ingredients.

A method for predicting preliminary design load cases using an artificial neural network, the method including obtaining, with a processor, historical data corresponding to an existing structural component, the historical data including finite element modeling analysis data and measured test data for the existing structural component, designing the artificial neural network to include a plurality of neurons to form a numerical model for preliminary design load cases of a new structural component, training, with the processor and the historical data for the existing structural component, the artificial neural network to predict the preliminary design load cases for the new structural component, providing input design parameters for the new structural component to the artificial neural network, and predicting, with the artificial neural network, the preliminary design load cases for the new structural component.

The invention discloses a sidetrack horizontal well track design method under control point constraint condition. The sidetrack horizontal well track design method comprises the following steps: determining known parameters; modeling well tracks; setting a hole deviation angle and an azimuth angle at a control point; solving the parameters of key points in a model; sieving a well track with the shortest total length. According to the sidetrack horizontal well track design method under control point constraint condition provided by the invention, the design models of the well tracks are given out, the hole deviation angle and the azimuth angle at the control point in the well tracks are selectively adopted, thus the well direction of the track at the control point is optimized, and then the method of the whole track is optimized; the design method is simple, tentative calculation is not required, the track with shorter length can be designed by inputting known conditions of design, so that the method is beneficial to shortening the drilling period and reducing the drilling cost.

Provision is made of a differential amplifier arrangement with a current source (S1), two controllable paths (T1, T2), which are in each case coupled by one terminal to the current source (S1) and the control terminals of which form the input of the differential amplifier arrangement. Via a respective cascode circuit (K1, K2), a load (L1, L2) is respectively connected to the first and second controllable paths (T1, T2). At least one tap (A1) between one of the loads and one of the cascode circuits forms an output of the differential amplifier arrangement. Provision is made of a comparison means (D1) having two inputs, which is designed for outputting a control signal dependent on a comparison. A first input is coupled to the first tap (A1) and the second input is designed for feeding a reference signal. Furthermore, the differential amplifier arrangement contains a regulable current source (G1), the control input of which is connected to the output of the comparison means and the current output of which is connected to the second terminal (P1) of at least the first controllable path (T1).

The present invention pertains to automated technology dependent transformations for CMOS digital design synthesis resulting in a combination of CMOS interconnected standard-cells from a target CMOS library being mapped and transistor-level representation for all or portion of the input design specification, the transistor level type and portion or portions to be represented at the transistor level representation being chosen by a user, transistor sizing and evaluating the combination of said transistor-level representation and standard-cell mapping iteratively to meet delay, size and power constraints for CMOS.

The invention provides a spacecraft remote control rapid test verification system and method based on a Lua script. The system comprises a telemetry front end module, a remote control front end module, a data subscription module, a test console and a main test processor. The main test processor further comprises a dynamic instruction generation module, a telemetry distribution module and a remotecontrol distribution module. The telemetry front end module receives telemetry information transmitted by a satellite and sends the information into the telemetry distribution module. The telemetry distribution module processes the telemetry information from the data source code state to the data engineering value state, and sends the information to the data subscription module. The dynamic instruction generation module proposes a subscription request for distribution. The dynamic instruction generation module completes Lua script function registration according to an input design file and generates a Lua script file. The test console receives a remote control command, and transmits the remote command to generate required parameters for the dynamic instruction generation module. The Lua script file is explained and executed to generate an instruction binary code. The instruction binary code is sent to the remote control front end module through the remote control distribution module, and is finally delivered to the satellite.

A system and method are disclosed for legalizing a flat or hierarchical VLSI layout to meet multiple grid constraints and conventional ground rules. Given a set of ground rules with multiple grid constraints and a VLSI layout (either hierarchical or flat) which is layout-versus-schematic (LVS) correct but may not be ground rule correct, the system and method provide a legalized layout which meets the multiple grid constraints while maintaining LVS correctness and fixing the ground rule errors as much as possible with minimum layout perturbation from the input design. The system and method support multiple grid pitch constraints for hierarchical design, and provide for LVS correctness to be maintained while an on-grid solution possibly with some spacing violations.

The invention provides an intelligent design system and method for a gun barrel. The system comprises an example knowledge management subsystem, an intelligent reasoning and decision-making subsystem and a design tool management subsystem; the intelligent design system obtains a similar example set and an associated knowledge set from an example knowledge base through an intelligent inference engine according to an input design objective, obtains an optimum design scheme through scheme evaluation and sorting, modifies a mechanism by using design parameters based on rules, correspondingly modifies design parameters of the optimum scheme through aid decision making of associated knowledge to meet a new design objective, realizes automatic generation of the 'scheme-model' by virtue of an encapsulation function of an executable template and finally forms a complete design scheme report. According to the invention, all links of gun barrel design are completed automatically and intelligently through a computer and the advantages of short development period, good design and developing quality, high design efficiency and the like are realized.

A system and method is disclosed for facilitating the management of pipeline reliability, maintenance, repair, and / or replacement. Embodiments may be computer-implemented, and may be suitable for prestressed concrete cylinder pipe (e.g., PCCP). Method steps include inspecting the pipe and storing or inputting design and inspection parameters, as well as the maximum expected pressure within the pipe. A relation of pressure versus degradation (e.g., number of broken wires) may be used, which may have zones of risk or classifications corresponding to pipe management actions. The pipe may be analyzed for lack of prestress over various portions of circumference and length. The pipe rupture pressure, crack onset pressure, or can rupture pressure may be analyzed and compared to the expected pressure. The method may be tested and the inspection repeated while tracking changes. The action may involve, for instance, doing nothing, monitoring the pipe, repairing the pipe, or replacing the pipe.

The invention discloses a linear engineering structure rapid BIM modeling method based on finite element grid division. The method comprises the steps of 1, setting a working environment; 2, inputtingthe design parameters; 3, longitudinally segmenting the structure; 4, cutting a characteristic cross section; 5, marking and drawing a control point on the longitudinal segmentation surface at the most front end; 6, marking and drawing a control point on the next longitudinal segmentation surface; 7, generating hexahedrons on the front longitudinal segmentation surface and the rear longitudinal segmentation surface; 8, generating a discontinuous component; 9, generating a structure entity; 10, carrying out model output. According to the present invention, the finite element analysis and the mesh division are considered in the parametric modeling process, the entity is established in the mode that points, lines and faces are arranged from low to high, the complex geometry with the topological association relation can be generated, the seamless combination of parametric BIM modeling and finite element analysis is achieved, and the high-quality finite element hexahedral mesh conversion is conducted. The method can be applied to all linear structures and has a wider application range.

The voltage surge protection device comprises at least one input designed to be connected to an electric power supply system, at least one output designed to be connected to an electric circuit to be protected, and voltage surge limiting means connected between the inputs and outputs to protect said electric circuit against voltage surges able to be applied on the inputs. The voltage surge limiting means comprise bidirectional series electronic limiting means comprising at least two inputs / outputs connected in series with at least one of said inputs, and which are turned on when a low voltage drop occurs when a circulating current is lower than a current limiting value, and limiting said circulating current by increasing a voltage drop between said inputs / outputs.

A charged particle beam writing method includes inputting design pattern data, virtually dividing a writing area to be written with the design pattern data into a plurality of small areas in a mesh-like manner, calculating a pattern density in each of the plurality of small areas based on the design pattern data, calculating a resizing amount for each pattern density in a case of irradiating a charged particle beam at an isofocal dose, resizing a dimension of the design pattern data in each of the plurality of small areas, based on the resizing amount in each of the plurality of small areas, and writing a resized design pattern on a target workpiece with the isofocal dose corresponding to the pattern density which was calculated before the resizing in each of the plurality of small areas.

An apparatus concurrently executing designing of a mechanism and developing of embedded software. A three-dimensional-mechanism model simulates an operation of the mechanism, an embedded software developing section develops a control program to control the designing and operation of the mechanism in parallel to each other, a first interface inputs designing data from a mechanism designing section to the three-dimensional-mechanism model simulator for being dynamically reflected on the three-dimensional-mechanism model, and a second interface transfers data between the three-dimensional-mechanism model simulator and the embedded software developing section while synchronizing the simulator and the embedded software developing section with each other.

Circuit-pattern-data correction method and semiconductor-device manufacturing method which prevent excessive correction from being made when model-based proximity-effect correction (OPC) is applied to a corrected circuit pattern, the excessive correction being caused by a step (difference in level) close to a circuit-pattern corner in the corrected circuit pattern, and the step being produced when rule-base OPC is applied. The rule-based OPC is applied to input design data in step S1; a step close to a circuit-pattern corner, produced by the rule-based OPC is detected in step S2; the step is removed in step S3; and the model-based OPC is applied and exposure data is generated in step S4.

A multilayered board data input unit inputs design data of a multilayered circuit board provided with through holes penetrating and mutually connecting solid-layer conductors disposed in a multilayer manner. A limitation rule setting unit sets a limitation rule for limiting the number of solid-layer conductors to be connected to the through holes. A separation processing unit separates connections of the solid-layer conductors to the through holes in the design data based on the limitation rule. At this time, when a solid-layer conductor to be separated from the through holes is selected as a candidate, the separation processing unit determines whether the solid-layer conductor is isolated by separation, when the solid-layer conductor is not isolated, determines isolation, and when the solid-layer conductor is isolated, stops separation.

A system for facilitating contact lens design comprises an input unit for input of design parameters, and a processing unit for calculating a post-lens pressure profile based on the design parameters. The processing unit is arranged, in use, to perform a finite model calculation allowing for large deflection and non-linear geometry effects in the deformation of a model lens shape. Preferably the finite element model calculation utilises solid elements of modelling the lens shape. A contact comprising a high Young's modulus material such as silicone hydrogel can be designed to have a maximum corneal or limbal post-lens pressure valve of less than 250 Pa.

While a base model has been determined for a product, in a system for performing a configuration designing operation of the product by setting a specification value to a specification item of the product, a product configuration design aiding system aids that a configuration designer can easily perform the configuration designing operation while following a restriction condition of a specification value of a specification item. A specification configuration information database is constructed which describes restriction conditions available for the specification values with respect to the specification item, and a configuration designing screen for inputting the specification values with respect to the specification item is displayed so as to conduct an input by the configuration designer.

A method and apparatus for partitioning of the input design into repeating patterns called template cores for the application of reticle enhancement methods, design verification for manufacturability and design corrections for optical and process effects is accomplished by hierarchy analysis to extract cell overlap information. Also hierarchy analysis is performed to extract hierarchy statistics. Finally template core candidates are identified. This allows to the design to be made amenable for design corrections or other analyses or modifications that are able to leverage the hierarchy of the design since the cell hierarchy could otherwise be very deep or cells could have significant overlap with each other.

A mask pattern formation method and apparatus capable of performing OPC and lithography verification and obtaining OPC result, and a lithography mask are provided. The method of forming a mask pattern from a design layout of a semiconductor integrated circuit comprises inputting a design layout, performing first OPC on the design layout, calculating a first evaluation value for a finished planar shape of a resist pattern corresponding to the design layout based on the first OPC, determining whether the first evaluation value satisfies a predetermined value, if the first evaluation value does not satisfy the predetermined value, locally altering the design layout, performing second OPC on the altered design layout, calculating a second evaluation value for the altered design layout, performing second determination, and if the second evaluation value satisfies the predetermined value, outputting the result of OPC and the first and second evaluation values.

The invention discloses a sustainable design method for architecture based on life-cycle cost (LCC) valuation, which comprises three stages of program design, preliminary design and construction documents design. Each step is composed of the following steps: 1) inputting design elements; 2) carrying out the program design, program evaluation and program selection based on a LCC sustainable design package; 3) outputting the design results. The sustainable design method for architecture based on life-cycle cost(LCC) valuation of the invention integrates LCC in the building design, forms the sustainable design package based on LCC, and establishes the sustainable design framework based on LCC, thus improves the sustainability of the building (design). Additionally, the invention improves the quota design mode, which enables the building design program to realize the lowest LCC under the condition of satisfying the quota constraint.