The embodiment of the invention relates to the technical field of analog integrated circuits, in particular to an LDO circuit with dynamic compensation and rapid 
transient response. The circuit comprises an input stage, a multi-
loop gain stage, an output stage and a load stage. By introducing the dynamic bias mode, 
gain of the input stage, C1 in the multi-
loop gain stage and a pole-zero doublet introduced by an MOS 
resistor RMN3 working in a deep 
linear region are related to load current ILoad, and the stability of loops within the whole load range is ensured. Meanwhile, due to the dynamic bias mode, the unity-
gain bandwidth of the input stage becomes larger, and the 
power supply rejection ratio of the circuit is increased. In addition, MP6 and MN11 adopted in the multi-
loop gain stage, sothat discharging of charges on an output cavity can be accelerated, and the circuit response speed during hopping from 
heavy load to 
light load is increased. Due to the MN9, discharging of charges ona power tube MP7 grid stray 
capacitor can be accelerated, and the response speed of the circuit during hopping from 
light load to 
heavy load is increased.