513 results about "Variable-frequency oscillator" patented technology

A DC-DC converter includes a variable frequency oscillator, a control system and a power train. The DC-DC converter is well suited for use in a cell phone. The control system uses the output of the oscillator to control the power train. The oscillator varies its frequency as a function of a pseudo random number generator, thereby reducing electromagnetic interference caused by ripple in the output of the DC-DC converter.

The invention solves a problem of fluctuation in performance in the conventional peripheral monitor for monitoring periphery of a vehicle that measures a distance to other vehicle or any other object by transmitting radio waves and informs a driver of the distance due to variation in environmental conditions such as water drop sticking onto the cover. A peripheral monitor 1 including a transmission antenna 2 for radiating transmission waves through the cover, a receiving antenna 3 for receiving reflected waves through the cover, and a data processor for measuring a distance to any object are disposed together in a cover 7. A transmission frequency at which reflected wave quantity is minimized is detected by detecting a first reflected signal level from the cover 7, and this frequency is a command to a variable frequency oscillator to conduct a transmission at this frequency at all times.

A method and a system for obtaining a proper resonance of the RF electrodes when using a preset or predetermined stable frequency oscillator in a cyclotron accelerator without using mechanical tuning devices. In order to maintain a high RF electrode voltage during operation the RF electrode system resonance is monitored and the frequency of the stable frequency generator is controlled by a feedback system continuously monitoring the matching of the oscillator output frequency and the resonance of the RF electrode system. Necessary small adjustments of the stable oscillator frequency to maintain a maximum matching to the resonance frequency of the RF electrode system are obtained by means of the feedback system to the stable oscillator. The feedback system relies on measured values obtained by a load phase sensor monitoring the output of the final RF power amplifier. A cyclotron control system in turn obtains the set and corrected oscillator frequency value and fine tunes further the magnetic field created in the accelerator device according to the frequency information obtained.

The present invention is a method and system for efficiently converting an alternating current (AC) supply to a direct current (DC) output. A power supply in accordance with the present invention may employ variable frequency constant on-time converters whereby switching losses of the converters are approximately proportional with a switching frequency, causing the power supply to be more efficient at light loads. Additionally, a power supply in accordance with the present invention may include multiple-phase converters in which each phase is designed for operation at a fraction of the total maximum load for the power supply.

An optical interrogation system 10 includes optical amplifying and gating apparatus, in the form of a semiconductor optical amplifier (SOA) 14 and an optical source 12, 14. Drive apparatus 22 (an electrical pulse generator driven by a variable frequency oscillator) is provided to generate electrical drive pulses (see inset (a)) which are applied to the SOA 14, to cause the SOA 14 to switch on and off. The optical source comprises a super-luminescent diode (SLD) 12, the CW output from which is gated into optical pulses by the SOA 14. The SOA 14 is optically coupled to the waveguide 16 containing an array of reflective optical elements (gratings G) to be interrogated. The interrogation system further includes an optical detector 18, optically coupled to the SOA 14, operable to evaluate the wavelength of a returned optical pulse transmitted by the SOA 14.

A compact narrow band interference suppressor. The narrow band interference suppressor includes a plurality of interference signal elimination circuits, a frequency compensation circuit, an AGC amp, and an AD converter that are connected in series. Each interference signal elimination circuit includes a mixer for synthesizing a local oscillation signal of a variable frequency oscillator to eliminate an interference signal with a band elimination filter. The frequency compensation circuit includes a mixer for synthesizing a signal having a frequency generated by the variable frequency oscillator to restore the signal to the frequency band of the signal input to the narrow band interference suppressor by the variable frequency oscillator. The AD converter converts the polarity of the signal in accordance with the number of times the signal passes through the mixer.

A multi-band receiver in which characteristics including a tracking error are improved is provided with a variable frequency oscillator circuit, a variable divider circuit (39) for dividing an oscillation signal (SVCO) of the variable frequency oscillator circuit, and mixer circuits (15I) and (15Q) for subjecting a received signal SRX to frequency conversion into an intermediate frequency signal (SIF) by a local oscillation signal (SLO). A divided output of the variable divider circuit (39) is supplied as the local oscillation signal (SLO) to each of the mixer circuits (15I) and (15Q). When a signal in a first frequency band is received, the division ratio n of the variable divider circuit (39) and the oscillation frequency of the variable frequency oscillator are changed to change the reception frequency in the first frequency band. When a signal in a second frequency band is received, at least the oscillation frequency of the variable frequency oscillator circuit is changed to change the reception frequency in the second frequency band.

A novel method and apparatus for calibrating DC offsets in a direct conversion receiver. The present DC offset calibration method and apparatus comprises a direct conversion receiver equipped with a frequency shifter means and a DC offset measurement and correction technique. In accordance with the present invention, DC offsets are calibrated in direct conversion receivers through an inventive method including two steps: a DC offset measurement step and a DC offset correction step. In the DC offset measurement step the frequency of a local oscillation signal (typically generated by a voltage-controlled oscillator (VCO)) is shifted by a selected frequency shift value during the inactive time intervals of the receiver. DC offsets are measured while the frequency of the down-conversion oscillation signal is shifted by the frequency shift value. Before the inactive time interval expires, the frequency of the down-conversion oscillator signal is shifted back to its original value. In the DC offset correction step of the present invention incoming signals are corrected using a correction means that removes the DC offset measured during the DC offset measurement step.

An optical interrogation system 10 includes optical amplifying and gating apparatus, in the form of a semiconductor optical amplifier (SOA) 14 and an optical source 12, 14. Drive apparatus 22 (an electrical pulse generator driven by a variable frequency oscillator) is provided to generate electrical drive pulses (see inset (a)) which are applied to the SOA 14, to cause the SOA 14 to switch on and off. The optical source comprises a super-luminescent diode (SLD) 12, the CW output from which is gated into optical pulses by the SOA 14. The SOA 14 is optically coupled to the waveguide 16 containing an array of reflective optical elements (gratings G) to be interrogated. The interrogation system further includes an optical detector 18, optically coupled to the SOA 14, operable to evaluate the wavelength of a returned optical pulse transmitted by the SOA 14.

The present invention relates to a timing system including an integrated circuit having an oscillator that provides both high and low frequency clock signals from a single high frequency crystal without the necessity of a tuning fork crystal. The low frequency signal is available for time-keeping applications, with low power consumption during “idle” periods. The high performance high frequency signal is available on demand for clock and frequency reference use. The oscillator of the present invention provides improved time-keeping accuracy, whilst size, cost and component count is reduced. Furthermore, phase noise and other critical parameters of the high frequency oscillator are not compromised. Shock vulnerability, a known problem for tuning fork crystals, is reduced.

A hybrid navigation satellite receiver and mobile telephone uses only two crystal oscillators. One that operates a master clock around 27-MHz and that consumes milliwatts of power. The other oscillator consumes only microwatts of power and operates continuously on battery power at about 32-KHz. Only the second, low frequency oscillator is kept running during power “off”. On power “restart”, a real-time-clock counter is consulted to cause an estimate of the GPS system time to be regenerated and supplied to the GPS-DSP to quicken its initialization. The master clock is GPS-calibrated, and the accurate clock is used to drive NCO's for the mobile telephone part and host CPU.

Disclosed herein is a charging equipment of variable frequency control for power factor. In addition, the present invention relates to a charging equipment of variable frequency control for power factor including: an AC-DC converter converting AC power into DC power; a DC-DC converter converting DC power output from the power factor calibration circuit into DC power for charging a battery and outputting the converted DC power; and a power factor calibration circuit calibrating power factor by the operation of the switching device and outputting the calibrated power factor; and a power factor calibration circuit controller performing the switching control by varying the frequency of the pulse signal when performing a switching control by modulating a pulse width of a pulse signal on the switching devices of the power factor calibration circuit, thereby making it possible to maintain the power factor even in the light load status.

A music-synchronized display apparatus includes a beat extractor configured to detect a portion in which a power spectrum in a spectrogram of an input music signal greatly changes and to output a detection output signal that is synchronized in time to the changing portion in synchronization with the input music signal; a tempo value estimation section configured to detect the self-correlation of the detection output signal from the beat extractor and to estimate a tempo value of the input music signal; a variable frequency oscillator in which an oscillation center frequency is determined on the basis of the tempo value from the tempo value estimation section and the phase of the output oscillation signal is controlled on the basis of a phase control signal; a phase comparator; a beat synchronization signal generation and output section; an attribute information storage section; an attribute information obtaining section; and a display information generator.

A constant voltage boost power supply according to an aspect of the invention includes a voltage-controlled variable frequency oscillator that produces and supplies a clock signal and changes an oscillating frequency of the supplied clock signal according to an input control voltage; a charge pump into which the clock signal is fed, the charge pump performing a pumping operation in synchronization with the clock signal to boost an input voltage and supply an output voltage in which the input voltage is boosted; a voltage dividing circuit that divides the output voltage of the charge pump to supply a monitor voltage; and a differential amplifier into which the monitor voltage and a reference voltage are fed, the differential amplifier amplifying a potential difference between the monitor voltage and the reference voltage to supply the control voltage.

A constant voltage boost power supply according to an aspect of the invention includes a voltage-controlled variable frequency oscillator that produces and supplies a clock signal and changes an oscillating frequency of the supplied clock signal according to an input control voltage; a charge pump into which the clock signal is fed, the charge pump performing a pumping operation in synchronization with the clock signal to boost an input voltage and supply an output voltage in which the input voltage is boosted; a voltage dividing circuit that divides the output voltage of the charge pump to supply a monitor voltage; and a differential amplifier into which the monitor voltage and a reference voltage are fed, the differential amplifier amplifying a potential difference between the monitor voltage and the reference voltage to supply the control voltage.

A variable frequency oscillator having multiple, independent frequency control inputs, each coupled to a respective tuning sub-circuit. The tuning sub-circuits are connected in parallel with each other and with a resonator module, which may be a quartz crystal, inductor, or other reactance component. Each tuning sub-circuit consists of two varactors with their respective cathodes coupled to each other and to their corresponding frequency control input. By having the tuning sub-circuits connected in parallel to the resonator, the overall frequency pull range of each frequency control input remains unaffected by the activation of any other frequency control input. Preferably, at least one frequency control input is a temperature compensation control input that can maintain the variable oscillator insensitive to temperature variations while the remaining frequency control inputs provide functional frequency control.

Apparatus, systems, and methods disclosed herein may initialize a delay-locked loop (DLL) or phase-locked loop (PLL) to achieve a locked condition and may then initiate a quiescent mode of operation. Quiescent operation may be achieved by breaking a feedback loop associated with the DLL or PLL to prevent updates to a variable delay line associated with the DLL and / or to a variable frequency oscillator associated with the PLL. An output clock phase associated with the DLL or PLL may thus be held substantially constant following a DLL initialization period. Additional embodiments are disclosed and claimed.

The use of a PLL including a phase detector responsive to the phase difference between an input signal and a feedback signal and which pilots an oscillator in function of this difference, is envisaged. The PLL also includes a feedback path that is responsive to the signal generated by the oscillator and which generates said feedback signal via at least one divider with a variable division ratio. The division ratio of said divider is modulated via a sigma-delta modulator, the input of which is fed with a triangular-wave modulating signal. The preferred application is that of a spread spectrum clock generator (SSCG) for digital electronic systems.

A frequency synthesiser (100) has a first variable frequency oscillator (10) for generating a first oscillator signal having a frequency responsive to a first control signal, a second variable frequency oscillator (50) for generating a second oscillator signal having a frequency responsive to a second control signal, and a phase reference generator (40) for generating a phase reference signal. There is a phase difference generator (30) for generating a phase difference signal indicative of the phase difference between the sum of the phases of the first and second oscillator signals and the phase of the phase reference signal. A controller (60) responsive to the phase difference signal generates the first and second control signals. At least one of the first and second control signal are determined dependent on a value of the phase difference signal, and at least one of them are determined dependent on a further characteristic of a signal, the further characteristic being supplementary to the effect of any dithering introduced into the frequency synthesiser (100).

The invention relates to a preparation method of monodisperse polylactic acid (PLA) microballoon spheres, which includes: (1) the PLA is dissolved in methylene dichloride so as to be taken as a dispersed phase and polyvinyl alcohol is dissolved in water so as to be used as a continuous phase; (2) two solutions are respectively put into injectors and the injectors are arranged on two boost pumps and connected with a microchannel reactor, and then the flow velocities of the dispersed phase and the continuous phase are adjusted to ensure that liquid drops with uniform size are continuously generated at the joint of the two phases; (3) the generated liquid drops are collected in the aqueous solution of the polyvinyl alcohol and a variable frequency oscillator is adopted to assist the volatilization of a solvent so as to ensure that the liquid drops are solidified to spheres; and (4) the spheres are washed by ionized water for a plurality of times and arranged in an oven for drying to obtain the monodisperse PLA microballoon spheres. The monodisperse PLA microballoon spheres prepared by the invention have a smooth surface and a particle size ranging from 200 Mum to 1000 Mum; a reaction device has simple and easy preparation process and controllable dimension of microchannels. The size of the prepared microballoon spheres can be conveniently adjusted and controlled and the variable frequency oscillator is adopted for quickening the solidification process of the PLA microballoon spheres, with low cost and less time consumption.

A pump system generally comprising an electrical connector operable to couple with an electric circuit to receive electricity, an electric motor operable to actuate a pump to pump a fluid, and a variable frequency drive (VFD) controller. The VFD controller is operable to control the rotational speed of the electric motor by providing a variable frequency signal to the electric motor to prevent the current utilized by the electric motor from exceeding a maximum current level associated with the electric circuit.

A high-frequency oscillator is provided, which decreases the phase noise and which has excellent mass productivity and reproducibility. This oscillator is comprised of (a) first, second, and third FETs formed on a substrate; (b) a first transmission line formed on the substrate; the first line being connected to drains of the first and second FETs formed on the substrate; (c) a second transmission line formed on the substrate; the second line being connected to gates of the first and second FETs; (d) a third transmission line formed on the substrate; the third line being connected to sources of the first and second FETs; (e) a fourth transmission line formed on the substrate; the fourth line being connected to the drain of the second FET and a drain of the third FET; (f) a fifth transmission line formed on the substrate; the fifth line being connected to the gate of the second FET and a gate of the third FET; and (g) a sixth transmission line formed on the substrate; the sixth line being connected to the source of the second FET and a source of the third FET. The first, second, and third transmission lines are coupled together due to electromagnetic field, and the fourth, fifth, and sixth transmission lines are coupled together due to electromagnetic field.

In a variable frequency oscillator in a semiconductor device, as the variation of an oscillation frequency caused by the variation of temperature and supply voltage and process variation is large, it is difficult to reduce the conversion ratio of control voltage dependent upon phase noise and the oscillation frequency and therefore, phase noise is large. The variation of the oscillation frequency is suppressed and phase noise is reduced by connecting a voltage-to-current conversion circuit that converts input control voltage to control current of a ring oscillator to the ring oscillator where delay circuits a delay time of which increases and decreases according to the amplitude of input control current are cascade-connected by a plurality of stages in a ring and increasing / decreasing current dependent upon any of temperature, supply voltage and the threshold voltage of a transistor inside the voltage-to-current conversion circuit.

The invention discloses an energy recovery system of a hybrid power single-pump multi-implementation-element engineering machine. The energy recovery system mainly comprises a planetary gear mechanism, a variable pump, an engine, a proportion direction valve, a variable motor, a fuel tank, a signal control unit, a rectifier / inverter, a variable frequency motor, a super-capacitor and the like. The signal control unit obtains a control signal from a control handle and a pressure sensor, sends out a control command to the engine, the variable pump, the proportion direction valve, an electromagnetic reversal valve, the rectifier / inverter, and the variable motor so as to control the position of the throttle position of the engine, the discharge capacity of the variable pump, the valve core displacement of the proportion direction valve, the work station of the electromagnetic reversal valve, the rotating speed of the variable frequency motor, and the discharge capacity of the variable motor, and therefore controls the action of the fuel tank. After the invention uses the planetary gear mechanism, a hybrid power system and the energy recovery system share one variable frequency motor, thereby reducing the installation space, and can recover the energy directly, thereby improving the recovery efficiency of the energy recovery system.

A system, method and system are disclosed for using a variable frequency clock generator to synchronize an average data rate over intervals of time in a variable clock domain to make it equal to a fixed data rate in a fixed clock domain while reducing electromagnetic interference, among other things. In various embodiments, setting the data rates equal to each other minimizes storage used to transition data signals between clock domains. In one embodiment, a variable frequency clock generator includes a phase modulator configured to form a variable frequency clock. Also, the variable clock generator is configured to maintain an average frequency over specific periods of time for the range of discrete frequencies. The phase-offset controller sets an average clock having substantially no offset between a fixed data rate in the fixed clock domain and an average data rate in the variable clock domain.

A music-synchronized display apparatus includes a beat extractor configured to detect a portion in which a power spectrum in a spectrogram of an input music signal greatly changes and to output a detection output signal that is synchronized in time to the changing portion in synchronization with the input music signal; a tempo value estimation section configured to detect the self-correlation of the detection output signal from the beat extractor and to estimate a tempo value of the input music signal; a variable frequency oscillator in which an oscillation center frequency is determined on the basis of the tempo value from the tempo value estimation section and the phase of the output oscillation signal is controlled on the basis of a phase control signal; a phase comparator; a beat synchronization signal generation and output section; an attribute information storage section; an attribute information obtaining section; and a display information generator.

The invention relates to the technical field of refrigerators, in particular to a frequency control method for a variable frequency refrigerator. The frequency control method includes the steps: S1, a variable frequency compressor runs under a set frequency and stops after running for a set on time T; S2, the variable frequency compressor waits for a set off time K and starts; S3, an on-rate, N=T / (T+K), is set; S4, after running for an actual on time t, the variable frequency compressor stops, and after waiting for an actual off time k, the variable frequency compressor starts, and an actual on-rate, n=t / (t+k), is set; S5, comparison on the set on-rate N and the actual on-rate n is made, if the actual on-rate n is smaller than the set on-rate N, the variable frequency compressor runs under a lower frequency next time, and the variable frequency compressor is at a lower speed; if the actual on-rate n is larger than the set on-rate N, the fact that the variable frequency compressor is poor in refrigerating capacity is judged, the variable frequency compressor runs under the higher frequency next time, and the variable frequency compressor is at a higher speed.

An ultrasonic broadband frequency transducer pest repulsion system comprises: a variable frequency generator; at least one ultrasonic frequency amplifier coupled to the variable frequency generator; and a transducer unit coupled to the ultrasonic frequency amplifier. The transducer unit comprises: a first transducer tuned at a first frequency located between a lower frequency and an upper frequency; a second transducer tuned at a second frequency located between the first frequency and the upper frequency, and a third transducer tuned at a third frequency located between the second frequency and the upper frequency.

A variable frequency oscillator (VFO) circuit having an increased frequency tuning range to selectively obtain operating frequencies above and below a set frequency. The circuit includes a tank inductor connected in parallel with a tank capacitor for primarily defining the set oscillating frequency of the VFO circuit. A switchable capacitor is included for selectively providing a predetermined step-wise decrease of the oscillating frequency to a frequency value below the set frequency of the circuit, and a varactor is included for accommodating selective tuning of the oscillating frequency within a range of frequency values below the set frequency. The inventive circuit selectively includes a switchable inductance element which is selectively electromagnetically coupled to the tank inductor to decrease the overall inductance value of the VFO circuit and, thereby, selectively increase the oscillating frequency above the set frequency value.